In recent years, many semiconductor memory devices having memory transistors (memory cells) disposed three-dimensionally (three-dimensional semiconductor memory devices) are proposed to increase the degree of integration of memory. For example, a conventional three-dimensional semiconductor memory device includes a columnar semiconductor layer extending in a perpendicular direction with respect to a substrate, and a conductive layer surrounding the columnar semiconductor layer with a charge storage layer interposed therebetween. The columnar semiconductor layer functions as a body of a memory transistor. In addition, the conductive layer functions as a gate of the memory transistor and as a word line connected to the memory transistor.
In a three-dimensional semiconductor memory device of the kind described above, when adjacent word lines short-circuit, problems arise in operation of all memory transistors connected to those word lines.